67 lines
2.1 KiB
Diff
67 lines
2.1 KiB
Diff
|
Fix CVE-2017-15289:
|
||
|
|
|
||
|
|
https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-15289
|
||
|
|
|
||
|
|
Patch copied from upstream source repository:
|
||
|
|
|
||
|
|
https://git.qemu.org/?p=qemu.git;a=commitdiff;h=eb38e1bc3740725ca29a535351de94107ec58d51
|
||
|
|
|
||
|
|
From eb38e1bc3740725ca29a535351de94107ec58d51 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Gerd Hoffmann <kraxel@redhat.com>
|
||
|
|
Date: Wed, 11 Oct 2017 10:43:14 +0200
|
||
|
|
Subject: [PATCH] cirrus: fix oob access in mode4and5 write functions
|
||
|
|
|
||
|
|
Move dst calculation into the loop, so we apply the mask on each
|
||
|
|
interation and will not overflow vga memory.
|
||
|
|
|
||
|
|
Cc: Prasad J Pandit <pjp@fedoraproject.org>
|
||
|
|
Reported-by: Niu Guoxiang <niuguoxiang@huawei.com>
|
||
|
|
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
|
||
|
|
Message-id: 20171011084314.21752-1-kraxel@redhat.com
|
||
|
|
---
|
||
|
|
hw/display/cirrus_vga.c | 6 ++----
|
||
|
|
1 file changed, 2 insertions(+), 4 deletions(-)
|
||
|
|
|
||
|
|
diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
|
||
|
|
index b4d579857a..bc32bf1e39 100644
|
||
|
|
--- a/hw/display/cirrus_vga.c
|
||
|
|
+++ b/hw/display/cirrus_vga.c
|
||
|
|
@@ -2038,15 +2038,14 @@ static void cirrus_mem_writeb_mode4and5_8bpp(CirrusVGAState * s,
|
||
|
|
unsigned val = mem_value;
|
||
|
|
uint8_t *dst;
|
||
|
|
|
||
|
|
- dst = s->vga.vram_ptr + (offset &= s->cirrus_addr_mask);
|
||
|
|
for (x = 0; x < 8; x++) {
|
||
|
|
+ dst = s->vga.vram_ptr + ((offset + x) & s->cirrus_addr_mask);
|
||
|
|
if (val & 0x80) {
|
||
|
|
*dst = s->cirrus_shadow_gr1;
|
||
|
|
} else if (mode == 5) {
|
||
|
|
*dst = s->cirrus_shadow_gr0;
|
||
|
|
}
|
||
|
|
val <<= 1;
|
||
|
|
- dst++;
|
||
|
|
}
|
||
|
|
memory_region_set_dirty(&s->vga.vram, offset, 8);
|
||
|
|
}
|
||
|
|
@@ -2060,8 +2059,8 @@ static void cirrus_mem_writeb_mode4and5_16bpp(CirrusVGAState * s,
|
||
|
|
unsigned val = mem_value;
|
||
|
|
uint8_t *dst;
|
||
|
|
|
||
|
|
- dst = s->vga.vram_ptr + (offset &= s->cirrus_addr_mask);
|
||
|
|
for (x = 0; x < 8; x++) {
|
||
|
|
+ dst = s->vga.vram_ptr + ((offset + 2 * x) & s->cirrus_addr_mask & ~1);
|
||
|
|
if (val & 0x80) {
|
||
|
|
*dst = s->cirrus_shadow_gr1;
|
||
|
|
*(dst + 1) = s->vga.gr[0x11];
|
||
|
|
@@ -2070,7 +2069,6 @@ static void cirrus_mem_writeb_mode4and5_16bpp(CirrusVGAState * s,
|
||
|
|
*(dst + 1) = s->vga.gr[0x10];
|
||
|
|
}
|
||
|
|
val <<= 1;
|
||
|
|
- dst += 2;
|
||
|
|
}
|
||
|
|
memory_region_set_dirty(&s->vga.vram, offset, 16);
|
||
|
|
}
|
||
|
|
--
|
||
|
|
2.15.0
|
||
|
|
|