gnu: linux-libre: Remove linux-libre-vblank-fix.patch.
* gnu/packages/patches/linux-libre-vblank-fix.patch: Remove file. * gnu-system.am (dist_patch_DATA): Remove it. * gnu/packages/linux.scm (linux-libre): Remove patch.
This commit is contained in:
Mark H Weaver
parent
463acb4acb
commit
46a1130207
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@ -459,7 +459,6 @@ dist_patch_DATA = \
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gnu/packages/patches/libvpx-fix-ssse3-quantize.patch \
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gnu/packages/patches/libvpx-fix-ssse3-quantize.patch \
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gnu/packages/patches/libvpx-vp9-out-of-bounds-access.patch \
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gnu/packages/patches/libvpx-vp9-out-of-bounds-access.patch \
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gnu/packages/patches/linux-libre-libreboot-fix.patch \
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gnu/packages/patches/linux-libre-libreboot-fix.patch \
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gnu/packages/patches/linux-libre-vblank-fix.patch \
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gnu/packages/patches/lirc-localstatedir.patch \
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gnu/packages/patches/lirc-localstatedir.patch \
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gnu/packages/patches/lm-sensors-hwmon-attrs.patch \
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gnu/packages/patches/lm-sensors-hwmon-attrs.patch \
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gnu/packages/patches/lua51-liblua-so.patch \
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gnu/packages/patches/lua51-liblua-so.patch \
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@ -273,8 +273,7 @@ for SYSTEM, or #f if there is no configuration for SYSTEM."
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(base32
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(base32
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"12nkzn1n4si2zcp10b645qri83m2y7iwp29vs2rjmy612azdab8f"))
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"12nkzn1n4si2zcp10b645qri83m2y7iwp29vs2rjmy612azdab8f"))
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(patches
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(patches
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(list (search-patch "linux-libre-libreboot-fix.patch")
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(list (search-patch "linux-libre-libreboot-fix.patch")))))
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(search-patch "linux-libre-vblank-fix.patch")))))
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(build-system gnu-build-system)
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(build-system gnu-build-system)
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(native-inputs `(("perl" ,perl)
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(native-inputs `(("perl" ,perl)
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("bc" ,bc)
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("bc" ,bc)
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@ -1,175 +0,0 @@
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From f9b61ff6bce9a44555324b29e593fdffc9a115bc Mon Sep 17 00:00:00 2001
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From: Daniel Vetter <daniel.vetter@ffwll.ch>
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Date: Wed, 7 Jan 2015 13:54:39 +0100
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Subject: [PATCH] drm/i915: Push vblank enable/disable past
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encoder->enable/disable
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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It is platform/output depenedent when exactly the pipe will start
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running. Sometimes we just need the (cpu) pipe enabled, in other cases
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the pch transcoder is enough and in yet other cases the (DP) port is
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sending the frame start signal.
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In a perfect world we'd put the drm_crtc_vblank_on call exactly where
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the pipe starts running, but due to cloning and similar things this
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will get messy. And the current approach of picking the most
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conservative place for all combinations also doesn't work since that
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results in legit vblank waits (in encoder->enable hooks, e.g. the 2
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vblank waits for sdvo) failing.
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Completely going back to the old world before
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commit 51e31d49c89055299e34b8f44d13f70e19aaaad1
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Author: Daniel Vetter <daniel.vetter@ffwll.ch>
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Date: Mon Sep 15 12:36:02 2014 +0200
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drm/i915: Use generic vblank wait
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isn't great either since screaming when the vblank wait work because
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the pipe is off is kinda nice.
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Pick a compromise and move the drm_crtc_vblank_on right before the
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encoder->enable call. This is a lie on some outputs/platforms, but
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after the ->enable callback the pipe is guaranteed to run everywhere.
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So not that bad really. Suggested by Ville.
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v2: Same treatment for drm_crtc_vblank_off and encoder->disable: I've
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missed the ibx pipe B select w/a, which also has a vblank wait in the
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disable function (while the pipe is obviously still running).
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Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Cc: Chris Wilson <chris@chris-wilson.co.uk>
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Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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---
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drivers/gpu/drm/i915/intel_display.c | 42 ++++++++++++++++++------------------
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1 file changed, 21 insertions(+), 21 deletions(-)
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index a1dbe74..e224820 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
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+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -4301,15 +4301,15 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
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if (intel_crtc->config.has_pch_encoder)
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ironlake_pch_enable(crtc);
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+ assert_vblank_disabled(crtc);
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+ drm_crtc_vblank_on(crtc);
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+
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for_each_encoder_on_crtc(dev, crtc, encoder)
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encoder->enable(encoder);
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if (HAS_PCH_CPT(dev))
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cpt_verify_modeset(dev, intel_crtc->pipe);
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- assert_vblank_disabled(crtc);
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- drm_crtc_vblank_on(crtc);
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-
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intel_crtc_enable_planes(crtc);
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}
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@@ -4421,14 +4421,14 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
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if (intel_crtc->config.dp_encoder_is_mst)
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intel_ddi_set_vc_payload_alloc(crtc, true);
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+ assert_vblank_disabled(crtc);
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+ drm_crtc_vblank_on(crtc);
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+
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for_each_encoder_on_crtc(dev, crtc, encoder) {
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encoder->enable(encoder);
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intel_opregion_notify_encoder(encoder, true);
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}
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- assert_vblank_disabled(crtc);
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- drm_crtc_vblank_on(crtc);
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-
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/* If we change the relative order between pipe/planes enabling, we need
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* to change the workaround. */
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haswell_mode_set_planes_workaround(intel_crtc);
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@@ -4479,12 +4479,12 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
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intel_crtc_disable_planes(crtc);
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- drm_crtc_vblank_off(crtc);
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- assert_vblank_disabled(crtc);
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-
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for_each_encoder_on_crtc(dev, crtc, encoder)
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encoder->disable(encoder);
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+ drm_crtc_vblank_off(crtc);
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+ assert_vblank_disabled(crtc);
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+
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if (intel_crtc->config.has_pch_encoder)
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intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
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@@ -4544,14 +4544,14 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
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intel_crtc_disable_planes(crtc);
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- drm_crtc_vblank_off(crtc);
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- assert_vblank_disabled(crtc);
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-
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for_each_encoder_on_crtc(dev, crtc, encoder) {
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intel_opregion_notify_encoder(encoder, false);
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encoder->disable(encoder);
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}
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+ drm_crtc_vblank_off(crtc);
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+ assert_vblank_disabled(crtc);
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+
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if (intel_crtc->config.has_pch_encoder)
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intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
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false);
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@@ -5021,12 +5021,12 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
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intel_update_watermarks(crtc);
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intel_enable_pipe(intel_crtc);
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- for_each_encoder_on_crtc(dev, crtc, encoder)
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- encoder->enable(encoder);
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-
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assert_vblank_disabled(crtc);
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drm_crtc_vblank_on(crtc);
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+ for_each_encoder_on_crtc(dev, crtc, encoder)
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+ encoder->enable(encoder);
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+
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intel_crtc_enable_planes(crtc);
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/* Underruns don't raise interrupts, so check manually. */
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@@ -5082,12 +5082,12 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
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intel_update_watermarks(crtc);
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intel_enable_pipe(intel_crtc);
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- for_each_encoder_on_crtc(dev, crtc, encoder)
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- encoder->enable(encoder);
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-
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assert_vblank_disabled(crtc);
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drm_crtc_vblank_on(crtc);
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+ for_each_encoder_on_crtc(dev, crtc, encoder)
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+ encoder->enable(encoder);
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+
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intel_crtc_enable_planes(crtc);
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/*
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@@ -5159,12 +5159,12 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
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*/
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intel_wait_for_vblank(dev, pipe);
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- drm_crtc_vblank_off(crtc);
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- assert_vblank_disabled(crtc);
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-
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for_each_encoder_on_crtc(dev, crtc, encoder)
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encoder->disable(encoder);
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+ drm_crtc_vblank_off(crtc);
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+ assert_vblank_disabled(crtc);
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+
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intel_disable_pipe(intel_crtc);
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i9xx_pfit_disable(intel_crtc);
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--
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2.2.1
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